1. Field of the Invention
The present application relates generally to an improved data processing apparatus and method and more specifically to an apparatus and method for providing a conditioning input buffer for clock interpolation.
2. Background of the Invention
High-precision phase interpolators are essential for generation and distribution of low-jitter clock signals in modern high-speed applications, such as microprocessors and Gigabit serial communication links. Such phase interpolators are typically used in situations where clock signals are not synchronized and thus misalignment and errors are possible.
One modern application of phase interpolators is in modern broadband communications equipment. Such broadband communications are typically fiber optic in nature with data transmissions via these fiber optic links being serial streams of data, but within a network component, such as a switch, relay, bridge, etc., the data is processed in parallel. In order to process such data, these network components typically have a serialization/de-serialization transceiver whose transmitter converts parallel data into serial data and whose receiver receives serial data and converts it back into parallel data. Because the clock signals of the transceivers of the various components are not synchronized, misalignment is possible and errors in the sampling of data at the receiver may be encountered.
Phase interpolators are also often used in microprocessor circuitry. For example, phase interpolators are often used in phase locked loops (PLLs), or delay locked loops (DLLs), for correcting the misalignment between clock signals, such as at asynchronous clock circuit boundaries.